
90
AT85C51SND3Bx
7632A–MP3–03/06
When using this mode, there is no influence over the USB controller.
Memory Management The controller only supports the following memory allocation management:
The reservation of a Pipe or an Endpoint can only be made in the growing order
(Pipe/Endpoint 0 to the last Pipe/Endpoint). The firmware shall thus configure them in
the same order.
The reservation of a Pipe or an Endpoint “k
i
” is done when its ALLOC bit is set. Then,
the hardware allocates the memory and insert it between the Pipe/Endpoints “k
i-1
” and
“k
i+1
”. The “k
i+1
” Pipe/Endpoint memory “slides” up and its data is lost. Note that the “k
i+2
”
and upper Pipe/Endpoint memory does not slide.
Clearing a Pipe enable (PEN) or an Endpoint enable (EPEN) does not clear neither its
ALLOC bit, nor its configuration (EPSIZE/PSIZE, EPBK/PBK). To free its memory, the
firmware should clear ALLOC. Then, the “k
i+1
” Pipe/Endpoint memory automatically
“slides” down. Note that the “k
i+2
” and upper Pipe/Endpoint memory does not slide.
The following figure illustrates the allocation and reorganization of the USB memory in a
typical example:
Figure 54. Allocation and reorganization USB memory flow
Endpoint 0
Endpoint 1 to N
Unused
[DPADDH – DPADDL]
USB DPRAM
Free memory
0
1
2
3
4
5
EPEN=1
ALLOC=1
Free memory
0
1
2
4
5
EPEN=0
(ALLOC=1)
Free memory
0
1
2
4
5
Pipe/Endpoints
activation
Pipe/Endpoint
Disable
Free its memory
(ALLOC=0)
Free memory
0
1
2
3 (bigger size)
5
Pipe/Endpoint
Activatation
Lost memory
4
Conflic
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