Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 160)

160

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0000 0000b

1 APLOAD

Audio Processor Load Enable Bit

Set to enable audio processor codec code update.

Clear to disable audio processor codec code update.

0 DAPEN

Digital Audio Processor Enable Bit

Set to enable the digital audio processor.

Clear to disable the digital audio processor.

Table 168. APSTA Register

APSTA (1.EAh) – Audio Processor Status Register

7 6 5 4 3 2 1 0

APSTAT7 APSTAT6 APSTAT5 APSTAT4 APSTAT3 APSTAT2 APSTAT1 APSTAT0

Bit

Number

Bit

Mnemonic

Description

7-0 APSTAT7:0

Audio Processor Status Byte

Codec firmware dependant.

Table 169. APINT Register

APINT (1.F4h) – Audio Processor Interrupt Register

7 6 5 4 3 2 1 0

APGPI3 APGPI2 APGPI1 APGPI0 APEVTI ACLIPI APRDYI APREQI

Bit

Number

Bit

Mnemonic

Description

7-4 APGPI3:0

Audio Processor General Purpose Interrupt Flag

Set by hardware to trigger a general purpose interrupt.

Cleared by hardware after writing APCON0.

3 APEVTI

Audio Processor Event Interrupt Flag

Set by hardware to signal an event from the audio processor.

Cleared by hardware after writing APCON0.

2 ACLIPI

Audio Clipping Interrupt Flag

Set by hardware when audio gain (digital volume or bass boost) leads to

saturation.

Cleared by hardware after writing APCON0.

1 APRDYI

Audio Packet Ready Interrupt Flag

Set by hardware when audio buffer has at least one data packet ready to be read

(512 or 256 bytes depending on buffer configuration).

Cleared by hardware when audio buffer is empty.

0 APREQI

Audio Packet Request Interrupt Flag

Set by hardware when audio buffer is able to receive one data packet (512 or

256 bytes depending on buffer configuration).

Cleared by hardware when audio buffer is full.

Bit

Number

Bit

Mnemonic Description

1 2 ... 155 156 157 158 159 160 161 162 163 164 165 ... 262 263

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