Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 7)

AT85C51SND3Bx

7632A–MP3–03/06

Signals Description

System Table 1. System Signal Description

Table 2. Ports Signal Description

Signal

Name

Type Description

Alternate

Function

RST I/O

Reset Input

Holding this pin low for 64 oscillator periods while the oscillator is

running resets the device. The Port pins are driven to their reset

conditions when a voltage lower than V

is applied, whether or not the

oscillator is running.

This pin has an internal pull-up resistor (R

RST

) which allows the device

to be reset by connecting a capacitor between this pin and V

Asserting RST when the chip is in Idle mode or Power-Down mode

returns the chip to normal operation.

In order to reset external components connected to the RST line a low

level 96-clock period pulse is generated when the watchdog timer

reaches its time-out period.

ISP I

In System Programming

Assert this pin during reset phase to enter the in system programming

mode.

OCDT

Signal

Name

Type Description

Alternate

Function

P0.7:0 I/O

Port 0

P0 is an 8-bit bidirectional I/O port with internal pull-ups.

LD7:0

P1.7:0 I/O

Port 1

P1 is an 8-bit bidirectional I/O port with internal pull-ups.

KIN3:0

P2.7:0 I/O

Port 2

P2 is an 8-bit bidirectional I/O port with internal pull-ups.

SDINS

SDLCK

SDCMD

SDCLK

SDDAT3:0

P3.4:0

P3.7:6

I/O

Port 3

P3 is a 7-bit bidirectional I/O port with internal pull-ups.

RXD

MISO

TXD

MOSI

INT0

RTS

SCK

INT1

CTS

UVCON

UID

1 2 3 4 5 6 7 8 9 10 11 12 ... 262 263

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