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AT85C51SND3Bx

7632A–MP3–03/06

Battery Voltage Monitor The battery voltage monitor is a 5-bit / 50 mV resolution A to D converter with fixed con-

version range as detailed in Table 18.

Table 18. Battery Voltage Value

Conversion Management The battery voltage monitor is turned on by setting the VBPEN and VBCEN bits in

PCON (see

Table 20). VBPEN bit is set first and VBCEN bit is set 1 ms later. An addi-

tional delay of 16 cycles is required before lauching any conversion.

Launching a conversion is done by setting VBEN bit in VBAT (see Table 22). VBEN is

automatically cleared at the end of the conversion which takes 34 clock periods. At this

step two cases occur:

• Voltage is valid (inside conversion range)

VBERR is cleared and conversion value is set in VB4:0 according to Table 18.

• Voltage is invalid (out of conversion range)

VBERR is set and value reported by VB4:0 is indeterminate.

Power Reduction Mode Two power reduction modes are implemented in the AT85C51SND3B: the Idle mode

and the Power-down mode. These modes are detailed in the following sections. In addi

tion to these power reduction modes, the clocks of the core and peripherals can be

dynamically divided by 2 using the X2 mode as detailed in

Section “X2 Feature”,

page 30.

Lock Mode In order to allow firmware to efficiently enter in idle mode and not to lose any events that

should come from one or more interrupts, power reduction modes entry are conditioned

to an hardware bit: PMLCK in PCON.

PMLCK is set by software in each ISR that needs to report an event to the system and

thus disables entry in power reduction mode and allows immediate processing of this

event. It is cleared by software after exiting power reduction mode.

As shown in Figure 9, when power reduction modes are disabled by setting PMLCK, IDL

and PD bits in PCON can not be set and idle or power down modes are not entered.

Figure 9. Power Reduction Controller Block Diagram

VB4:0 Battery Voltage (V)

00000 [0.9 - 0.95[

00001 [0.95 - 1.0[

00010 [1.0 - 1.05[

… …

01110 [1.6 - 1.65[

01111 [1.65 - 1.7[

10000 [1.7 - 1.75[

System Idle

System Power Down

IDL

PCON.0

PCON.1

PMLCK

PCON.2

Write to IDL

Write to PD

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 262 263

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