Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 147)

147

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0000 0000b

Bit

Number

Bit

Mnemonic

Description

7-0 PDAT7:0

Pipe Data Bits

Set by the software to read/write a byte from/to the Pipe FIFO selected by

PNUM.

Table 151. UPBCHX Register

UPBCHX (1.D4h) – USB Pipe Data Counter High Register

7 6 5 4 3 2 1 0

- - - - - PBYCT10 PBYCT9 PBYCT8

Bit

Number

Bit

Mnemonic

Description

7-3 -

Reserved

The value read from these bits is always 0. Do not set these bits.

2-0 PBYCT10:8

Byte count (high) Bits

Set by hardware. This field is the MSB of the byte count of the FIFO endpoint.

The LSB part is provided by the UPBCLX register.

Table 152. UPBCLX Register

UPBCLX (1.D5h) – USB Pipe Data Counter Low Register

7 6 5 4 3 2 1 0

PBYCT7 PBYCT6 PBYCT5 PBYCT4 PBYCT3 PBYCT2 PBYCT1 PBYCT0

Bit

Number

Bit

Mnemonic

Description

7-0 PBYCT7:0

Byte Count (low) Bits

Set by the hardware. PBYCT10:0 is:

- (for OUT Pipe) increased after each writing into the Pipe and decremented after

each byte sent,

- (for IN Pipe) increased after each byte received by the host, and decremented

after each byte read by the software.

1 2 ... 142 143 144 145 146 147 148 149 150 151 152 ... 262 263

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