Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 74)

100

101

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0000 0000b

Table 87. SCHCLK Register

SCHCLK (0.FEh) – Scheduler Clocks Register

76543210

- T0ETB2 T0ETB1 T0ETB0 - - - -

Bit

Number

Bit

Mnemonic Description

Reserved

The value read from this bit is always 0. Do not set this bit.

6-4 T0ETB2:0

Timer 0 Enhanced Time Base Bits

Refer to Table 79 for dividing values.

3-0 -

Reserved

The value read from these bits is always 0. Do not set these bits.

1 2 ... 69 70 71 72 73 74 75 76 77 78 79 ... 262 263

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