Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 192)

192

AT85C51SND3Bx

7632A–MP3–03/06

tion from the card through the SDCMD line. These channels are detailed in the following

sections.

Figure 87. Command Line Controller Block Diagram

Command Transmitter For sending a command to the card, the command index (1 Byte) and argument (4

Bytes) must be loaded in the command transmit FIFO using the MMCMD register.

Before starting transmission by setting the TXCEN bit in MMCON1 register, software

must first configure:

• RXCEN bit in MMCON1 register to indicate whether a response is expected or not.

• RFMT bit in MMCON0 register to indicate the response size expected.

• CRCDIS bit in MMCON0 register to indicate whether the CRC7 included in the

response will be computed or not. In order to avoid CRC error, CRCDIS may be set

for response that do not include CRC7.

Figure 88 summarizes the command transmission flow.

The TXCEN flag is set until the end of transmission. The end of the command transmis-

sion is signalled by the EOCI flag in MMINT register becoming set. This flag may

generate an interrupt request as detailed in

Section “Interrupt”. The end of the command

transmission also clears the TXCEN flag.

Command loading may be aborted by setting and clearing the CTPTR bit in MMCON0

CTPTR

MMCON0.4

CRPTR

MMCON0.5

SDCM

TXCEN

MMCON1.0

TX COMMAND Line

Finished State Machine

Data Converter

// -> Serial

TX Pointer

RFMT

MMCON0.1

CRCDIS

MMCON0.0

RXCEN

MMCON1.1

Data Converter

Serial -> //

RX Pointer

17-Byte

MMCMD

CRC7

Generator

RX COMMAND Line

Finished State Machine

CRC7 and Format

Checker

CRC7S

MMSTA.2

RESPFS

MMSTA.1

EOCI

MMINT.5

EORI

MMINT.6

Command Transmitter

Command Receiver

Read

FIFO

17-Byte

MMCMD

Write

FIFO

1 2 ... 187 188 189 190 191 192 193 194 195 196 197 ... 262 263

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