
38
AT85C51SND3Bx
7632A–MP3–03/06
Table 42. Interrupt SFRs
Mnemonic Add Name 7 6 5 4 3 2 1 0
IEN0 0.A8h Interrupt Enable Control 0 EA EAUP EDFC ES ET1 EX1 ET0 EX0
IEN1 0.B1h Interrupt Enable Control 1 - - EMMC ENFC ESPI EPSI EKB EUSB
IPH0 0.B7h Interrupt Priority Control High 0 - IPHAUP IPHDFC IPHS IPHT1 IPHX1 IPHT0 IPHX0
IPL0 0.B8h Interrupt Priority Control Low 0 - IPLAUP IPLDFC IPLS IPLT1 IPLX1 IPLT0 IPLX0
IPH1 0.B3h Interrupt Priority Control High 1 - - IPHMMC IPHNFC IPHSPI IPHPSI IPHKB IPHUSB
IPL1 0.B2h Interrupt Priority Control Low 1 - - IPLMMC IPLNFC IPLSPI IPLPSI IPLKB IPLUSB
Table 43. I/O Port SFRs
Mnemonic Add Name 7 6 5 4 3 2 1 0
P0 Y.80h 8-bit Port 0
P1 Y.90h 8-bit Port 1
P2 Y. A0h 8-bit Port 2
P3 Y. B0h 8-bit Port 3
P4 0.98h 8-bit Port 4
P5 0.C8h 4-bit Port 5
Table 44. Timer SFRs
Mnemonic Add Name 7 6 5 4 3 2 1 0
TCON 0.88h Timer/Counter 0 and 1 Control TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
TMOD 0.89h Timer/Counter 0 and 1 Modes GATE1 C/T1# M11 M01 GATE0 C/T0# M10 M00
TL0 0.8Ah Timer/Counter 0 Low Byte
TH0 0.8Ch Timer/Counter 0 High Byte
TL1 0.8Bh Timer/Counter 1 Low Byte
TH1 0.8Dh Timer/Counter 1 High Byte
WDTRST 0.A6h Watchdog Timer Reset
WDTPRG 0.A7h Watchdog Timer Program - - - - - WTO2:0
Table 45. RAM Interface
Mnemonic Add Name 7 6 5 4 3 2 1 0
RDFCAL 1.FDh RAM DFC Low Address Byte RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
RDFCAM 1.FEh RAM DFC Medium Address Byte RA15 RA14 RA13 RA12 RA11 RA10 RA9 RA8
RDFCAH 1.FFh RAM DFC Higher Address Byte - - - - - - - RA16
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