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149

AT85C51SND3Bx

7632A–MP3–03/06

Audio Controller The Audio Controller embedded in AT85C51SND3Bx is based on four functional blocks

detailed in the following sections:

• The Clock Generator

• The Audio Processor

• The Audio Codec

• The Audio DAC Interface

Figure 69. Audio Controller Block Diagram

Clock Generator The clock generator generates the audio controller clocks based on the audio clock

issued by the clock controller as detailed in

Section “System Clock Generator”, page 29.

As shown in Figure 70, it contains an Audio Frequencies Generator able to generate the

audio sampling and over-sampling frequencies fed by a normalized clock. This genera-

tor is based on a PLL and is entirely controlled by the audio processor depending on the

encoded or decoded audio stream characteristics.

Figure 70. Audio Controller Clock Generator

Audio Processor The audio processor is based on three functional blocks as shown in Figure 71.

• The Audio Buffer

• The Digital Audio Processor

• The Baseband Processor

Audio Codec

AUD

CLOCK

OUTR

OUTL

LINR

LINL

MICIN

MICBIAS

Audio DAC

DDAT

DSEL

DCLK

OCLK

Clock

Generator

Interface

Audio Processor

DFC

Bus

CPU

Bus

ACCKEN

AUCON.0

AUD

CLOCK

Clock

Normalizing

Audio Frequencies

Generator

1 2 ... 144 145 146 147 148 149 150 151 152 153 154 ... 262 263

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