Atmel AT85DVK-07 Especificaciones descargar pdf (Pagina 83)

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 0000 0000b

3 DRDY0

Channel 0 Destination Ready Flag

Set by hardware when the source peripheral of channel 0 is ready.

Cleared by hardware when the source peripheral of channel 0 is not ready.

2 SRDY0

Channel 0 Source Ready Flag

Set by hardware when the destination peripheral of channel 0 is ready.

Cleared by hardware when the destination peripheral of channel 0 is not ready.

1 EOFI0

Channel 0 End Of Data Flow Interrupt Flag

Set by hardware at the end of a channel 0 data flow transfer.

Cleared by software by setting EOFIA0 in DFCCON. Can not be set by software.

0 DFBSY0

Channel 0 Busy Flag

Set by hardware when a transfer is on-going on channel 0.

Cleared by hardware when no transfer is on-going on channel 0.

Table 96. DFCCON Register

DFCCON (1.85h) – DFC Channel Control Register

7 6 5 4 3 2 1 0

DFABT1 EOFE1 EOFIA1 - DFABT0 EOFE0 EOFIA0 -

Bit

Number

Bit

Mnemonic

Description

7 DFABT1

Channel 1 Abort Control Bit

Set to trigger an abort on channel 1.

This bit is cleared by hardware.

6 EOFE1

Channel 1 End Of Data Flow Interrupt Enable Bit

Set to enable channel 1 EOF interrupt.

Clear to disable channel 1 EOF interrupt.

5 EOFIA1

Channel 1 End Of Flow Interrupt Acknowledge Bit

Set to acknowledge the channel 1 EOF interrupt (clear EOFI1 flag).

Clearing this bit has no effect.

The value read from this bit is always 0.

4 -

Reserved

The value read from this bit is always 0. Do not set this bit.

3 DFABT0

Channel 0 Abort Control Bit

Set to trigger an abort on channel 0.

This bit is cleared by hardware.

2 EOFE0

Channel 0 End Of Data Flow Interrupt Enable Bit

Set to enable channel 0 EOF interrupt.

Clear to disable channel 0 EOF interrupt.

1 EOFIA0

Channel 0 End Of Flow Interrupt Acknowledge Bit

Set to acknowledge the channel 0 EOF interrupt (clear EOFI0 flag).

Clearing this bit has no effect.

The value read from this bit is always 0.

0 -

Reserved

The value read from this bit is always 0. Do not set this bit.

Bit

Number

Bit

Mnemonic Description

1 2 ... 78 79 80 81 82 83 84 85 86 87 88 ... 262 263

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