Atmel AT7910E Manual de usuario Pagina 14

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AT7910E [DATASHEET]
7796G AERO 02/13
14
5.2 Pin Description
Table 5-2. Pin Description
Signal Name(1)(3)
Type(2)
Function
Buffer type
VDDA
VDDB
VDDPLL
3.3V Power for the device
POWER
VSSA
VSSB
VSSPLL
Ground for the device
POWER
LVDSRef
LVDS Power reference for the device
POWER
VCOBias
Bias for the PLL VCO (Rvco)
LoopFilter
Internal PLL filter
CLK
I
System Clock - Provides the reference clock for all the
AT7910E modules except the SpaceWire interface
receivers
CMOS3V3
RST*
I
Asynchronous active low system reset
CMOS3V3
FEEDBDIV[2:0]
I
PLL feedback divider configuration - Set the internal PLL
output clock rate
CMOS3V3
DOUT+[1:8]
DOUT-[1:8]
O
Differential output pair - Data part of Data-Strobe
SpaceWire link 1 to 8.
LVDS+ LVDS-
SOUT+[1:8]
SOUT-[1:8]
O
Differential output pair - Strobe part of Data-Strobe
SpaceWire link 1 to 8.
LVDS+ LVDS-
DIN+[1:8]
DIN-[1:8]
I
Differential input pair - Data part of Data-Strobe
SpaceWire link 1 to 8.
LVDS+ LVDS-
SIN+[1:8]
SIN-[1:8]
I
Differential input pair - Strobe part of Data-Strobe
SpaceWire link 1 to 8.
LVDS+ LVDS-
EXTOUTDATA9[8:0]
O
Output data from external port zero FIFO.
Bit eight determines the data type data, EOP or EEP
CMOS3V3
EXTINDATA9[8:0]
I
Input data from external port zero FIFO.
Bit eight determines the data type data, EOP or EEP
CMOS3V3
EXTOUTEMPTY9*
O
FIFO ready signal for external output port zero. When high
the FIFO has data. When low the FIFO is empty
CMOS3V3
EXTOUTREAD9*
I
Asserted Low to read from the external output port zero
FIFO.
CMOS3V3
EXTINFULL9*
O
FIFO ready signal for external input port zero. When high
there is space in the FIFO so it can be written to. When
low the FIFO is full.
CMOS3V3
EXTINWRITE9*
I
Asserted Low to write to the external input port zero FIFO.
CMOS3V3
EXTOUTDATA10[8:0]
O
Output data from external port one FIFO.
Bit eight determines the data type data, EOP or EEP
CMOS3V3
EXTINDATA10[8:0]
I
Input data from external port one FIFO.
Bit eight determines the data type data, EOP or EEP
CMOS3V3
EXTOUTEMPTY10*
O
FIFO ready signal for external output port one. When high
the FIFO has data. When low the FIFO is empty
CMOS3V3
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